Daniel Cheok Kiang Kho, Mohammad Faizal Ahmad Fauzi, Sin Liang Lim

Corresponding email: lim.sin.liang@mmu.edu.my

Corresponding email: lim.sin.liang@mmu.edu.my

**Published at : ** 29 Nov 2019

**IJtech :** IJtech
Vol 10, No 7 (2019)

**DOI :** https://doi.org/10.14716/ijtech.v10i7.3263

Kho, D.C.K., Fauzi, M.F.A. Lim, S.L., 2019. Hardware-Based Sobel Gradient Computations for Sharpness Enhancement.

166

Daniel Cheok Kiang Kho | Faculty of Engineering, Multimedia University, Persiaran Multimedia, 63100 Cyberjaya, Selangor, Malaysia |

Mohammad Faizal Ahmad Fauzi | Faculty of Engineering, Multimedia University, Persiaran Multimedia, 63100 Cyberjaya, Selangor, Malaysia |

Sin Liang Lim | Faculty of Engineering, Multimedia University, Persiaran Multimedia, 63100 Cyberjaya, Selangor, Malaysia |

Abstract

The majority of imaging systems are software based; they require some
kind of microprocessor or microcontroller for the imaging algorithms to run. As
the speed requirements of imaging and communications systems increase, the need
for more hardware-based imaging systems arises. These fully hardware systems
solve the fundamental problem inherent in software-based solutions, in which
the speed of the algorithms depend on the instruction cycle speed of the
processor. Once an algorithm is designed directly on hardware, the speed of the
algorithm depends on the system clock frequency and the propagation delays of
the logic cells (or standard cells) used in the design, usually measured in
nanoseconds per cell. Therefore, such systems no longer depend on any instruction
cycle delays, as there is no microprocessor involved. Most modern imaging and
communications systems rely on digital signal processing (DSP) to compute
complex mathematical operations. The emergence of powerful and low-cost
field-programmable gate array (FPGA) devices with hundreds of arithmetic
multipliers has enabled the development of many such DSP hardware applications,
traditionally implemented only as software solutions.

Digital signal processing; Edge detection; Gradient; Sobel; VHDL

Introduction

Lately, there have
been several texts (Li & Chu, 1997; Nelson, 2000; Yasri et al., 2009; Mehra & Verma, 2012; Nosrat &
Kavian, 2012; Sanduja & Patial, 2012; Singh et al., 2012; Umar et al., 2012; Bhagat et al., 2015) written on
hardware-based Sobel implementations on FPGAs using VHDL (Ashenden, 2008) or
Verilog. However, nearly all of these advocate the use of calculating the
gradient magnitude by obtaining the sum of the absolute values of the gradient in
both the horizontal and vertical directions. Implementing gross
approximations of many such nonlinear imaging algorithms (Arce et al., 2000; Aubert & Kornprobst, 2006; Bertalm?o et al., 2001; Chambolle, 1994; Kokkinos, 2013; Kornprobst et al., 1999; Mitra & Sicuranza, 2001; Xu & Mueller, 2010) on
hardware has become common practice.Although this
approach simplifies the hardware implementation by avoiding the more
computationally intensive square root calculations, the resulting gradient
magnitude suffers from having more errors than a gradient magnitude calculated
using the Pythagorean theorem of square-rooting the sum of squares of the
gradients in each horizontal and vertical direction.

Before other algorithms are performed, usually, an image filter is applied. This preprocessing filter helps ease the computation of further downstream algorithms, such as those used in optical character recognition systems (Pangestu et al., 2017), or the K-NN algorithms (Naik & Metkewar, 2015) used in artificial intelligence. Either a spatial filter, such as a Sobel edge detector, or a histogram equalizer frequency domain filter may be used as the prefilter, depending on the type of further processing required.

This paper introduces a computationally efficient technique
of preserving the precision of the gradient magnitude by using an efficient and
fast square root algorithm in the computation of the gradient magnitude.
Although we also introduce a different kernel processing scheme that computes
kernels in parallel, this paper focuses its discussion on the use of the fast
reciprocal square root (FRSR) algorithm for hardware-based Sobel edge
detection.

Conclusion

The Sobel algorithm, used frequently in many edge detection algorithms,
has been shown to be feasibly implemented on digital hardware. However, the
gradient magnitude of these implementations used the summation of the absolute
values of the g_{x } and g_{x} gradients as its
estimate , whereas in our implementation, we used the actual square
root operator to compute the gradient magnitude. Using the FRSR algorithm gives
a more accurate estimate of the gradient magnitude as computed from the square
root of the square of the gradients in both the horizontal and vertical
directions

Acknowledgement

The authors are thankful to the Ministry of Higher
Education of Malaysia for the award of the Fundamental Research Grant Scheme
FRGS/1/2015/TK04/MMU/02/10 to support this project. We are also thankful to
Jeannie Lau and Ang Boon Chong for the many technical discussions that helped
us complete this project.

References

Ananthalakshmi, A.V., Sudha, G.F., 2017. Design of a Reversible
Floating-point Square Root using Modified Non-restoring Algorithm. *Microprocessors and Microsystems*, Volume
50, pp. 39–53

Arce, G.R., Bacca, J., Paredes, J.L., 2000. *Nonlinear Filtering for Image Analysis and Enhancement*. The
Essential Guide to Image Processing. Massachusetts: Academic Press

Ashenden, P.J., 2008. *The
Designer’s Guide to VHDL*, Volume 3. Massachusetts: Morgan Kaufmann

Aubert, G., Kornprobst, P., 2006. *Mathematical
Problems in Image Processing: Partial Differential Equations and the Calculus
of Variations*. Volume 147. Berlin: Springer

Bertalm?o, M., Cheng, L.T., Osher, S., Sapiro, G., 2001. Variational
Problems and Partial Differential Equations on Implicit Surfaces. *J**.** Computational Physics*, Volume 174(2), pp. 759–780

Bhagat, A.R., Dixit, S.R., Deshmukh, A.Y., 2015. VHDL Based Sobel Edge
Detection. *International Journal
Engineering Research and General Science*, Volume 3(1), pp. 1217–1223

Chambolle, A., 1994. Partial Differential Equations and Image
Processing. *In:* Proc. IEEE Int. Conf.
Image Processing, Volume 1, pp. 16–20

Ercegovac, M.D., Lang, T., Muller, J.M., Tisserand, A., 2000.
Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions
using Small Multipliers. *IEEE
Transactions on Computers*, Volume 49(7), pp. 628–637

Ercegovac, M.D., Muller, J.M., Tisserand, A., 2005. Simple Seed
Architectures for Reciprocal and Square Root Reciprocal. *In:*
Conference Record of the Thirty-Ninth Asilomar Conference on Signals, Systems
and Computers, pp. 1167–1171

Istoan, M., Pasca, B., 2015. *Fixed-Point
Implementations of the Reciprocal, Square Root and Reciprocal Square Root
Functions*. Hal Archives-Ouvertes

Kanjar, D., Masilamani, V., 2013a. A New No-reference Image Quality
Measure for Blurred Images in Spatial Domain. *International Journal of Image and Graphics,* Volume 1(1), pp. 39–42

Kanjar, D., Masilamani, V., 2013b. Image Sharpness Measure for Blurred
Images in Frequency Domain*. **Procedia Engineering*, Volume 64, pp. 149–158

Kanjar, D., Masilamani, V., 2017. Image Quality Assessment for Blurred
Images using Nonsubsampled Contourlet Transform Features. *Journal of Computers*, Volume 12(2), pp. 156–164

Kho, D.C.K., Fauzi, M.F.A., Lim, S.L., 2018. Hardware Implementation of
Low-latency 32-bit Floating-point Reciprocal Square Root. *Journal of Electrical & Electronic Systems*, Volueme 7(4), pp. 1–4

Kokkinos, I., 2013. *Introduction
to Nonlinear Image Processing. Center for Visual Computing*.* Ecole Centrale Paris*. Available Online
at http://vision.mas.ecp.fr/Personnel/iasonas/course/nonlinear.pdf

Kornprobst, P., Deriche, R., Aubert, G., 1999. Image Sequence Analysis
via Partial Differential Equations. *Journal
of Mathematical Imaging and Vision*, Volume 11(1), pp. 5–26

Kreyszig, E., 2011. *Advanced
Engineering Mathematics*. 10^{th} Edition. New Jersey: John Wiley & Sons

Lachowicz, S., 2008. Fast Evaluation of the Square Root and Other
Nonlinear Functions in FPGA. *In:*
Proceedings of the 4^{th} IEEE International Symposium on Electronic
Design, Test & Applications, pp. 474–477

Li, Y., Chu, W., 1997. Implementation of Single Precision Floating Point
Square Root on FPGAs. *In:* Proceedings
of the 5^{th} Annual IEEE Symposium on Field-Programmable Custom
Computing Machines, pp. 226–232

Lomont, C., 2003. *Fast Inverse
Square Root*. Technical Report 32. Department of Mathematics, Purdue
University, West Lafayette, Indiana, USA

Mehra, R., Verma, R., 2012. Area Efficient FPGA Implementation of Sobel
Edge Detector for Image Processing Applications. *International Journal of Computer Applications*, Volume 56(16), pp. 7–11

Mitra, S.K., Sicuranza, G. L., 2001. *Nonlinear
Image Processing*. Massachusetts: Academic
Press

Naik, S., Metkewar, P., 2015. Recognizing Offline Handwritten
Mathematical Expressions (ME) based on a Predictive Approach of Segmentation
using K-NN Classification. *International
Journal of Technology*, Volume 6(3), pp. 345–354

Nanhe, A., Gawali, G., Ahire, S., Sivasankaran, K., 2013. Implementation
of Fixed and Floating Point Square Root using Nonrestoring Algorithm on FPGA. *Int. J. Computer and Electrical Engineering*,
Volume 5(5), pp. 533–537

Nelson, A.E., 2000. Implementation of Image Processing Algorithms on
FPGA Hardware. *M.Sc. Dissertation*,
Vanderbilt University, Nashville, TN, USA

Nosrat, A., Kavian, Y.S., 2012. Hardware Description of Multi-directional
Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA. *International Journal of Computer
Applications*, Volume 47(25), pp. 1–7

Pangestu, P., Gunawan, D., Hansun, S., 2017. Histogram Equalization
Implementation in the Preprocessing Phase on Optical Character Recognition. *International Journal of Technology*, Volume 8(5), pp. 947–956

Robertson, M., 2012. A Brief History of InvSqrt. *B.Sc. Dissertation*, University of New Brunswick, New
Brunswick, Canada

Sajid, I., Ahmed, M.M., Ziavras, S.G., 2010. Pipelined Implementation of
Fixed Point Square Root in FPGA using Modified Non-restoring Algorithm. *In:* The 2^{nd} International
Conference Computer and Automation Engineering (ICCAE), Singapore, pp. 226–230

Sanduja, V., Patial, R., 2012. Sobel Edge Detection using Parallel Architecture
based on FPGA. *International Journal
Applied Information Systems (IJAIS)*, Volume 3(4), pp. 20–24

Singh, S., Saini, A.K., Saini, R., 2012. Real-time FPGA Based
Implementation of Color Image Edge Detection. *International Journal of Image, Graphics, and Signal Processing*, Volume
4(12), pp. 19–25

Umar, A., Li, H., Aguirre, A., Zhu, Q., 2012. FPGA-based Reconfigurable
Processor for Ultrafast Interlaced Ultrasound and Photoacoustic Imaging. *IEEE Transaction Ultrasonics, Ferroelectrics
and Frequency Control*, Volume 59(7), pp. 1344–1353

Wang, X., 2007. Variable Precision Floating-Point Divide and Square Root
for Efficient FPGA Implementation of Image and Signal Processing Algorithms. *Master’s Thesis,* *Ph.D. Dissertation*, Northeastern Univ., Massachusetts, USA

Xu, W., Mueller, K., 2010. Evaluating Popular Non-linear Image
Processing Filters for Their Use in Regularized Iterative CT. *In:* Proceedings of IEEE Nuclear Science
Symposium (NSS/MIC), pp. 2864–2865

Yasri, I., Hamid, N.H., Yap, V.V., 2009. An FPGA Implementation of
Gradient Based Edge Detection Algorithm Design. *In:* International Conference on Computer Technology and
Development, Kota Kinabalu, Malaysia, Volume 2,
pp. 165–169

Zafar, S., Adapa, R., 2014. Hardware
Architecture Design and Mapping of Fast Inverse Square Root Algorithm. *In:* Proceedings 2014 International Conference
on Advances in Electrical Engineering (ICAEE), pp. 1–4