Seedless-electroplating Process Development for Micro-features Realization
Corresponding email: yudan@eng.ui.ac.id
Published at : 30 Dec 2015
Volume : IJtech
Vol 6, No 6 (2015)
DOI : https://doi.org/10.14716/ijtech.v6i6.1724
Whulanza, Y., Sitanggang, T., Istiyanto, J., Supriadi, S., 2015. Seedless-electroplating Process Development for Micro-features Realization. International Journal of Technology. Volume 6(6), pp. 1050-1056
| Yudan Whulanza | Department of Mechanical Engineering, Faculty of Engineering, Universitas Indonesia, Kampus Baru UI Depok, Depok 16424, Indonesia |
| Tito Sitanggang | Department of Mechanical Engineering, Faculty of Engineering, Universitas Indonesia, Kampus Baru UI Depok, Depok 16424, Indonesia |
| Jos Istiyanto | Department of Mechanical Engineering, Faculty of Engineering, Universitas Indonesia, Kampus Baru UI Depok, Depok 16424, Indonesia |
| Sugeng Supriadi | Department of Mechanical Engineering, Faculty of Engineering, Universitas Indonesia, Kampus Baru UI Depok, Depok 16424, Indonesia |
This study aims to combine the seedless-electroplating process with maskless-lithography, as an alternative for Lithografie, Galvanoformung, Abformung (LIGA) or Lithography, Electroplating and Molding with a normal, simpler, and cheaper semiconductor process with tolerable results for nickel electroplating. This study reports the results of various voltages on seedless-electroplating over time, where the optimal combination occurs at an exposure of 7.5 Volts of Direct Current (VDC) for 30 seconds. The thickness of electroplated metal is at a range of ±1.5µm. Moreover, a resolution of ±10µm and roughness (Ra) of ±0.31µm was achieved during the metal deposition process.
LIGA, Maskless-lithography, Seedless-electroplating, Wet chemical etching
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